A Low Multiplier and Multiplication Costs 256-point FFT Implementation with Simplified Radix-24 SDF Architecture

@article{fan2006,
  title = {A Low Multiplier and Multiplication Costs 256-point FFT Implementation with Simplified Radix-24 SDF Architecture},
  author = {Chih-Peng Fan and Mau-Shih Lee and Guo-An Su},
  journal = {APCCAS},
  year = {2006},
  month = {Jan},
  doi = {10.1109/apccas.2006.342239},
  url = {https://doi.org/10.1109/apccas.2006.342239},
}

Chih-Peng Fan et al. (2006). A Low Multiplier and Multiplication Costs 256-point FFT Implementation with Simplified Radix-24 SDF Architecture. APCCAS. https://doi.org/10.1109/apccas.2006.342239

Chih-Peng Fan, et al.. "A Low Multiplier and Multiplication Costs 256-point FFT Implementation with Simplified Radix-24 SDF Architecture." APCCAS, 2006, https://doi.org/10.1109/apccas.2006.342239.

Chih-Peng Fan, et al.. "A Low Multiplier and Multiplication Costs 256-point FFT Implementation with Simplified Radix-24 SDF Architecture." APCCAS (2006). https://doi.org/10.1109/apccas.2006.342239

Chih-Peng Fan et al., 2006. A Low Multiplier and Multiplication Costs 256-point FFT Implementation with Simplified Radix-24 SDF Architecture. APCCAS. Available at: <https://doi.org/10.1109/apccas.2006.342239>.

TY  - JOUR
TI  - A Low Multiplier and Multiplication Costs 256-point FFT Implementation with Simplified Radix-24 SDF Architecture
AU  - Chih-Peng Fan
AU  - Mau-Shih Lee
AU  - Guo-An Su
PY  - 2006
JO  - APCCAS
DO  - 10.1109/apccas.2006.342239
UR  - https://doi.org/10.1109/apccas.2006.342239
ER  -