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@article{chang2014, title = {A high throughput CAVLC architecture design with two-path parallel coefficients procedure for digital cinema 4K resolution H.264/AVC encoding}, author = {Chia-Wei Chang and Wei-Hsuan Lin and Hsiang-Cheng Yu and Chih-Peng Fan}, journal = {ISCAS}, year = {2014}, month = {Jan}, doi = {10.1109/iscas.2014.6865709}, url = {https://doi.org/10.1109/iscas.2014.6865709}, }
Chia-Wei Chang et al. (2014). A high throughput CAVLC architecture design with two-path parallel coefficients procedure for digital cinema 4K resolution H.264/AVC encoding. ISCAS. https://doi.org/10.1109/iscas.2014.6865709
Chia-Wei Chang, et al.. "A high throughput CAVLC architecture design with two-path parallel coefficients procedure for digital cinema 4K resolution H.264/AVC encoding." ISCAS, 2014, https://doi.org/10.1109/iscas.2014.6865709.
Chia-Wei Chang, et al.. "A high throughput CAVLC architecture design with two-path parallel coefficients procedure for digital cinema 4K resolution H.264/AVC encoding." ISCAS (2014). https://doi.org/10.1109/iscas.2014.6865709
Chia-Wei Chang et al., 2014. A high throughput CAVLC architecture design with two-path parallel coefficients procedure for digital cinema 4K resolution H.264/AVC encoding. ISCAS. Available at: <https://doi.org/10.1109/iscas.2014.6865709>.
TY - JOUR TI - A high throughput CAVLC architecture design with two-path parallel coefficients procedure for digital cinema 4K resolution H.264/AVC encoding AU - Chia-Wei Chang AU - Wei-Hsuan Lin AU - Hsiang-Cheng Yu AU - Chih-Peng Fan PY - 2014 JO - ISCAS DO - 10.1109/iscas.2014.6865709 UR - https://doi.org/10.1109/iscas.2014.6865709 ER -