Scheduling Challenges and Opportunities in Integrated CPU+GPU Processors

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Kapil Dev,Sherief Reda

ESTIMedia

published 1st of January, 2016

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DBLP: conf/estimedia/DevR16
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HuggingPeers ID: ID hpp-Ug9Ubljfemh
Publication: ESTIMedia
Published: 1st of January, 2016

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Source	ID	Citations
DBLP	conf/estimedia/DevR16	—

Cite this paper

@article{dev2016,
  title = {Scheduling Challenges and Opportunities in Integrated CPU+GPU Processors},
  author = {Kapil Dev and Sherief Reda},
  journal = {ESTIMedia},
  year = {2016},
  month = {Jan},
}

Kapil Dev & Sherief Reda (2016). Scheduling Challenges and Opportunities in Integrated CPU+GPU Processors. ESTIMedia.

Kapil Dev, and Sherief Reda. "Scheduling Challenges and Opportunities in Integrated CPU+GPU Processors." ESTIMedia, 2016.

Kapil Dev, and Sherief Reda. "Scheduling Challenges and Opportunities in Integrated CPU+GPU Processors." ESTIMedia (2016).

Kapil Dev and Sherief Reda, 2016. Scheduling Challenges and Opportunities in Integrated CPU+GPU Processors. ESTIMedia.

TY  - JOUR
TI  - Scheduling Challenges and Opportunities in Integrated CPU+GPU Processors
AU  - Kapil Dev
AU  - Sherief Reda
PY  - 2016
JO  - ESTIMedia
ER  -