Real-Time Dynamically Run-Time Reconfiguration for Power-/Cost-optimized Virtex FPGA Realizations

@article{becker2003,
  title = {Real-Time Dynamically Run-Time Reconfiguration for Power-/Cost-optimized Virtex FPGA Realizations},
  author = {Jürgen Becker and Michael Hübner and Michael Ullmann},
  journal = {VLSI-SOC},
  year = {2003},
  month = {Jan},
}

Jürgen Becker et al. (2003). Real-Time Dynamically Run-Time Reconfiguration for Power-/Cost-optimized Virtex FPGA Realizations. VLSI-SOC.

Jürgen Becker, et al.. "Real-Time Dynamically Run-Time Reconfiguration for Power-/Cost-optimized Virtex FPGA Realizations." VLSI-SOC, 2003.

Jürgen Becker, et al.. "Real-Time Dynamically Run-Time Reconfiguration for Power-/Cost-optimized Virtex FPGA Realizations." VLSI-SOC (2003).

Jürgen Becker et al., 2003. Real-Time Dynamically Run-Time Reconfiguration for Power-/Cost-optimized Virtex FPGA Realizations. VLSI-SOC.

TY  - JOUR
TI  - Real-Time Dynamically Run-Time Reconfiguration for Power-/Cost-optimized Virtex FPGA Realizations
AU  - Jürgen Becker
AU  - Michael Hübner
AU  - Michael Ullmann
PY  - 2003
JO  - VLSI-SOC
ER  -