Hongjiang Song
15 papers 2006–2016
Novel mixed domain VLSI signal processing circuits for high performance, low power and area penalty SOC signal processing
2008-01
SoCC
Architecture and Implementation of Power and Area Efficient Receiver Equalization Circuit for High-Speed Serial Data Communication
2006-01
SoCC
A neural rehabilitation chip with neural recording, peak detection, spike rate counter, and biphasic neural stimulator
2014-01
SoCC
I/Q-Channel Mismatch Transfer and Amplification Effects and Applications to the Measurement and Calibration of Integrated VLIF RF Receivers
2006-01
SoCC