Sergio Bampi

AppGNN: Approximation-Aware Functional Reverse Engineering using Graph Neural Networks

The globalization of the Integrated Circuit (IC) market is attracting an ever-growing number of partners, while remarkably lengthening the supply chain. Thereby, security concerns, such as those...

Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization

Logic synthesis is a fundamental step in hardware design whose goal is to find structural representations of Boolean functions while minimizing delay and area. If the function is...

Quality and Complexity Assessment of Learning-Based Image Compression Solutions

This work presents an analysis of state-of-the-art learning-based image compression techniques. We compare 8 models available in the Tensorflow Compression package in terms of visual quality...

Area and Throughput Trade-Offs in the Design of Pipelined Discrete Wavelet Transform Architectures

The JPEG2000 standard defines the discrete wavelet transform (DWT) as a linear space-to-frequency transform of the image domain in an irreversible compression. This irreversible discrete wavelet...

SHBS: A heuristic for fast inter mode decision of H.264/AVC standard targeting VLSI design

A Model Predictive Controller for Frame-Level Rate Control in Multiview Video Coding

Motion Vectors Merging: Low Complexity Prediction Unit Decision Heuristic for the Inter-prediction of HEVC Encoders

A high throughput and low cost diamond search architecture for HDTV motion estimation

A real time H.264/AVC intra frame prediction hardware architecture for HDTV 1080P video

Spread and Iterative Search: A High Quality Motion Estimation Algorithm for High Definition Videos and Its VLSI Design

High Throughput Architecture of JPEG Compressor for Color Images Targeting FPGAs

An Efficient Exponential Unit Designed in VLSI CMOS with Custom Operators

Impact of Noise on Trim Circuits for Bandgap Voltage References

High performance architectures for the arithmetic encoder of the H.264/AVC CABAC entropy coder

A Configurable Pruning Gaussian Image Filter for Energy-Efficient Edge Detection

Using efficient adder compressors with a split-radix butterfly hardware architecture for low-power IoT smart sensors

Exploring Approximate Arithmetic Units for a Power-Efficient Kalman Gain VLSI Design

Power efficient architecture for motion estimation using the QSDS-DIC algorithm